CARLO GAVAZZI WM4-96 - PROGRAMMING Instrukcja Użytkownika Pobierz pdf (Strona 5)

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WM4-96

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1.3 MEMORY AREA

WM4-96 manages four different memory areas addressed as follows.

Function 04h and 06h:

Memory area Area Byte reading order

Internal RAM

0000h 00E7h MSB, LSB

Internal RAM

00E8h 1FFFh LSB, MSB

Data storage EEPROM

2000h 3FFFh MSB, LSB

Real Time Clock

4000h 5FFFh LSB

Function 80h:

Memory area Area Byte reading order

Flash Memory

From 0000h MSB, LSB

The Flash Memory is composed by 4095 pages, shared in three different blocks containing different

kind of information:

- from page 0000 to page 3993: logged data

- from page 3394 to page 3395: telephone numbers and SMS messages

- from page 3396 to page 4095: load profile data

The Flash Memory addressing requires to indicate the page number (from 0 to 4095), followed by

the word address in that specific page (from 0 to 527) and from the number of words to be read.

Therefore the addressing requires 4 bytes to be written as a single 32-bit word: the 14 more

significant bits indicate the page, the following 10 bits define the address inside the page, the 8 less

significant bits indicate the number of word to be read (maximum 132 word).

Flash Memory addressing table

Memory area Word address and number of words (4 byte) Byte reading order

Flash Memory

00pppppppppppppp iiiiiiii wwwwwwww MSB, LSB

where

pppppppppppppp = page number (14 bit)

iiiiiiii = word address inside the pppppppppppppp page (8 bit)

wwwwwwww= number of words to be read

It is only possible to reset the logged data from the Flash Memory using fixed frames (see paragraph

5.4)

NOTE: in the following pages the following notation will be used:

1 int = 4 byte;

1 short = 2 byte;

1 word = 2 byte;

1 byte = 8 bit.

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